This application claims the benefit of Korean Patent Application No. 1999-44727, filed on Oct. 15, 1999, and the benefit of Korean Patent Application No. 2000-36221, filed on Jun. 28, 2000, each of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a thin film transistors (TFT) in a liquid crystal display (LCD) device. More particularly, the present invention relates to a low-resistivity gate line on LCD glass panel substrates.
2. Description of the Related Art
The length and density of bus-line conductors, such as gate lines, on large-size high-resolution LCD panels present special manufacturing problems. As LCD panels become greater in size, the bus-line conductors necessarily become longer. Forming relative long conductors on a glass substrate, such as the gate lines matrices in a bottom-gate TFT-LCD, gives rise to problems due to the resistivity of the conductive material (including signal delays and pulse distortion). Metals such as aluminum appear to be suitable for use as bus-line conductors on 18+ inch active matrix liquid crystal display (AMLCD) panels having XGA resolution or higher. Pure aluminum offers the advantage of low resistivity (approximately 3.0-xcexcxcexa9-cm) but its use as a TFT bus-line material on a glass substrate presents practical problems.
One problem with using pure aluminum for the gate line in an LCD is the formation of undesirable surface features, known as hillocks, when the deposited aluminum is heated above 200xc2x0 C. during processing. Hillocks are formed because of the mismatch in the thermal expansion coefficient between the glass and the metal conductor. Stresses in the aluminum are released as hillocks when the substrate and metal are heated. Hillocks are a major impediment to the use of aluminum lines on glass substrates because in certain TFT architectures the aluminum conductors must be covered with a layer of insulating material, for example, a gate insulating layer. Deposition of the gate insulating layer involves processes which require the substrate to be heated above the aluminum yielding point (150xc2x0 C.-200xc2x0 C.), and, it is at such temperatures that hillocks are formed. Manufacturing yields suffer because hillocks cause shorts across conductors and thus the manufactured devices are defective.
A conventional approach to prevent hillocks from forming is to form bus lines out of aluminum alloys instead of pure aluminum. Alloys made of aluminum and tantalum (Ta), neodymium (Nd), zirconium (Zr), copper (Cu) and tungsten/molybdenum (W/Mo) all are less likely to form hillocks at conventional process temperatures when compared to pure Al. However, such alloys do not have the low resistivity of pure aluminum. They also present handling problems during deposition and have performance problems due to the non-uniform distribution of the constituent metals.
Another approach to limit the formation of hillocks is to cap pure aluminum with a layer of a suitable metal such as titanium (Ti). Capping greatly reduces the formation of hillocks and is also effective against corrosion. However, capping includes significant disadvantages because of the additional process steps involved, which increase the costs and lowers manufacturing yields.
To overcome the problems described above, preferred embodiments of the present invention provide a thin film transistor and a method of manufacturing the same in which the gate line has a simple structure and excellent electrical characteristics.
A preferred embodiment of the present invention is a thin film transistor device including a substrate, a copper alloy line on the substrate. The copper alloy line has an oxidation film on the upper surface of the copper alloy line. The copper alloy line includes magnesium of y concentration and which has a thickness t. The concentration of magnesium in the copper alloy line in relation to the thickness is   y  ≤            94      t        .  
The concentration of magnesium is about 4.5 atomic percent. The oxidation film is magnesium oxide (MgO). The oxidation film has a thickness of about 150 xc3x85. The copper alloy line further includes aluminum. The concentration of aluminum contained in the copper alloy line is about 2.0 atomic percent and the concentration of magnesium is about 4.5 atomic percent. The substrate also includes silicon. The thin film transistor device further includes aluminum oxide (Al2O3) located at an interface between the substrate and the copper alloy line.
In another preferred embodiment of the present invention, a method of manufacturing a thin film transistor device includes the steps of providing a substrate, and forming a copper alloy line on the substrate. The copper alloy line includes a concentration y of magnesium, and the copper alloy line has a thickness t, wherein the concentration y of magnesium in relation to the thickness t of the copper alloy line is   y  ≤      94    t  
The method also includes heat-treating the copper alloy line in an oxygen (O2) atmosphere.
The heat-treatment is carried out at a temperature in the range of about 250xc2x0 C. to about 500xc2x0 C. and in a vacuum in the range of about 5 mTorr to about 5 Torr. Preferably, the heat-treatment is carried out at a temperature of about 350xc2x0 C. and in a vacuum of about 10 mTorr. The method further includes the step of heat-treating the copper alloy line using Ar plasma. The temperature during the Ar plasma heat treatment is about 100xc2x0 C.
In another preferred embodiment of the present invention a thin film transistor includes a substrate, and a gate electrode made of copper alloy on the substrate. The gate electrode includes a concentration y of magnesium, and the gate electrode has a thickness t, wherein the concentration y of magnesium in relation to the thickness is   y  ≤      94    t  
Also provided in a gate insulating layer made of magnesium oxide on the upper surface of the gate electrode, an active layer on the gate insulating layer, an ohmic contact layer on the active layer, and source and drain electrodes on the ohmic contact layer.
The gate insulating layer has a thickness of about 150 xc3x85. The TFT further includes a silicon nitride (SiNx) layer located between the gate insulating layer and the active layer.
In another preferred embodiment of the present invention, a method of manufacturing a thin film transistor, includes the steps of providing a substrate, and forming a gate electrode made of copper alloy on the substrate. The gate electrode has a thickness t, and the gate electrode includes a concentration y of magnesium. The concentration y in relation to the thickness t is   y  ≤      94    t  
The method also includes heat-treating the gate electrode in an oxygen atmosphere so as to form an oxidation film on an upper surface of the gate electrode, forming an active layer on the oxidation film, forming an ohmic contact layer on the active layer, and forming source and drain electrodes on the ohmic contact layer.
Additional steps in the method includes forming a silicon nitride film between the oxidation film and the active layer. The heat-treatment is carried out at a temperature in the range of about 250xc2x0 C. to about 500xc2x0 C. and in a vacuum in the range of about 5mTorr to about 5 Torr. Preferably, the heat-treatment is carried out at a temperature of about 350xc2x0 C. and in a vacuum of about 10 mTorr. The method can also include the step of heat-treating the gate electrode using Ar plasma. The temperature during heat-treatment using Ar plasma is about 100xc2x0 C. A concentration of oxygen contained in the copper alloy line is less than about 1 atomic percent.
In another preferred embodiment of the present invention, a method of manufacturing a thin film transistor device includes the steps of providing a substance, forming a copper alloy line on the substrate, and forming an oxidation film on the upper surface of the copper alloy line. The copper alloy line includes magnesium of y concentration and having a thickness t, wherein the concentration y of magnesium in the copper alloy line in relation to the thickness t is as follows:   y  ≤            94      t        .  
Preferred embodiments of the present invention includes the following advantages. First, since a dense magnesium oxide structure is formed on the copper alloy gate electrode, additional process steps for the insulating layer is no longer required. Second, since copper is low in resistivity, the TFT is able to perform a high-speed switching. Third, if the gate insulating layer has a dual-layered structure of magnesium oxide and silicon nitride, more stable electrical characteristic for the TFT is obtained. Fourth, since the thickness of the silicon nitride film is reduced due to the dense magnesium oxide structure, the process time is also reduced. Finally, if the copper line is heat-treated using Ar plasma during the oxidation reaction of the copper alloy line, the temperature during the oxidation process is able to be as low as about 100xc2x0C.